1. Field of the Invention
The invention relates to the field of solid state electronics. More particularly, the invention relates to a method of fabricating a semiconductor device and a device so formed.
2. Description of the Prior Art
In general, when fabricating a semiconductor device, a particular spacing between layers of semiconductor material produces a device having particular operating characteristics. For example, a correct anode-to-cathode spacing in a silicon controlled rectifier (SCR) is critical to achieving particular operating characteristics such as a certain level of forward voltage. Specifically, in a vertical SCR, an anode layer and a cathode layer are produced on opposing surfaces of a semiconductor wafer. Obtaining the correct anode-to-cathode spacing, i.e., a distance between the anode and cathode layers, in a vertical SCR is typically accomplished by choosing a thin silicon wafer and diffusing appropriate anode and cathode dopants deep into the wafer. The depth of the diffusion determines the anode-to-cathode spacing. Although deep diffusion techniques produce useful vertical SCRs, unfortunately considerable difficulty has been experienced by those skilled in the art in accurately diffusing the dopant to a required depth. Also, the depth to which adopant can be diffused into a substrate has practical limitations. Additionally, diffusion inaccuracy increases with required diffusion depth; therefore, the diffusion inaccuracy and the limited diffusion depth limits deep diffusion techniques to use with very thin wafers. Consequently, maximum wafer diameter, which is a function of wafer thickness, is severely limited.
Consequently, those concerned with the development of semiconductor devices, such as vertical SCRs, have long recognized the need for improved fabrication techniques which mitigate problems associated with achieving accurate layer spacing.